Brainfuck Microcomputer

Sunday, June 19th, 2011

Brainfuck implemented in hardware 😀

Download it here:

brainfuckmicrocomputer.zip

Extract from README.txt:


The brainfuck Microcomputer is a VHDL-designed computer that uses
a VHDL-designed microprocessor with brainfuck programming language
as its assembly language.

With a proper suite of software, the hardware described by these
files can be configured in a FPGA in order to make the brainfuck
Microcomputer ‘come alive’.

What does the computer contains
Internally, the brainfuck Microcomputer has the following components:
* User-configurable brainfuck Microprocessor
* Program memory with an user-defined size
* User-configurable RS-232 UART
* Hardware to assist in memory programming

Externally, the brainfuck Microcomputer has the following pins:
* System clock input
* Mode Switch input
* Reset Button input
* UART receiving input
* UART transmitting output

Modes of operation
The computer described has two modes of operation: Programming Mode
(Mode Switch on) and Normal Mode (Mode Switch off). The first one allows
the user to download a program into the computer’s memory and the second
one executes it.
If the Reset Button and/or the Mode Switch is on, brainfuck
microprocessor is reset: the program counter, stack pointer and
registers are all set to zero.

Input / Output
Communication with the brainfuck Microcomputer happens through its
user-configurable RS-232 UART.
If the computer is in Programming Mode, bytes received by the UART
will be sequentially stored in program memory starting from the first
address.
If the computer is in Normal Mode, the UART will be used as the
input/output device required by the brainfuck programming language.
Note: the only UART parameter that can be configured is its baud rate.
The other parameters are 8/N/1
(8 bits of data, no parity bits, 1 stop bit).

User configuration
The brainfuck Microcomputer has some user-configurable parameters in
the GENERIC section of the main file:
* CLK_FREQ: The frequency (in Hz) of the clock that will run the computer
* BAUD_RATE: The baud rate of the UART
* D: Number of bits of the Program Memory Address
(i.e. program memory will have 2^ D words)
* P: Number of bits of Microprocessor Register Pointer
(i.e. there will be 2^ P registers to use by the program)
* S: Number of bits of Microprocessor Stack Pointer
(i.e. stack for nested loops will have 2^ S locations).

Brainfuck compilation
The brainfuck Microprocessor needs a compiled version of brainfuck
programming language. The binary file format is just a sequence of
compiled instructions.
The brainfuck commands are translated into instructions according to the
following rules:
* > becomes 0x80
* < becomes 0x81
* + becomes 0x82
* – becomes 0x83
* . becomes 0x84
* , becomes 0x85
* ] becomes 0x87
* [ becomes the offset-1 of the matching ].

As an example, let’s consider the following program:
++++ > , < [ > ++ < – ] > . ,

It has to be sent to brainfuck Microcomputer as the following sequence:
0x82 0x82 0x82 0x82 0x80 0x85 0x81 0x05
0x80 0x82 0x82 0x81 0x83 0x87 0x80 0x84
0x85

Note that the ] offset relative to the [ is 6, so [ has to be compiled
as 0x05.
Note also that if the ‘,’ at the end is ommited, program execution will
continue throughout the memory, overflowing the program counter and
returning to the beginning.

Brainfuck Microprocessor operation
The brainfuck Microprocessor is a physical implementation of the machine
model required by the language. It has a register bank that can
increment, decrement, output and store the register addressed by
a register pointer, which in turn can be incremented and decremented.
It also has a program counter with increment and load capabilities and
a stack that is used for return addresses of a loop.
The microprocessor has also a control unit and an instruction decoder.

The machine cycle of the processor consists of four clock cycles,
each with a corresponding state:
1) Output Program Counter to read program memory
2) Read, register and decode instruction
3) Execute instruction
4) Continue with instruction execution and update Program Counter

A summary of how the brainfuck instructions are executed:
(‘PC’ is ‘Program Counter’ and ‘current register’ is used to refer to
‘register pointed by Register Pointer’)
(0) > Increment Register Pointer and increment PC
(1) < Decrement Register Pointer and increment PC
(2) + Increment current register and increment PC
(3) – Decrement current register and increment PC
(4) . Ouput current register and assert activation signal
of output device.
If done signal is returned, increment PC, else do not modify PC
(stay here until done signal is returned – until data has been sent)
(5) , Assert activation signal of input device.
If done signal is returned, increment PC and save data to current
register, else do not modify PC
(stay here until done signal is returned – until data has been received)
(6) [ If current register is zero, add to PC the value of the
instruction (offset-1 of matching bracket) plus two in order to make
PC point to the instruction following the matching bracket.
Else, push PC into stack and then increment it.
(7) ] Pop stack. If current register is zero, increment PC.
If current register is not zero, load value from stack into PC.

Other
Any questions, improvements, comments are welcome 🙂

SejoProyectos: Verano 2011

Thursday, May 19th, 2011

Ahora que empezaron las vacaciones, no hay que desaprovechar la gran oportunidad que se nos está dando para realizar proyectos sin presiones y distracciones de la escuela.

En este post describo varios proyectos que tengo ganas de realizar este verano, los publico porque pienso que estaría muy bien que colaboráramos entre varias personas para desarrollarlos.

Cada proyecto tiene su título, una pequeña descripción, y una lista de actividades generales que el proyecto implica. Cuando dice diseño de hardware digital se refiere a usar VHDL e implementarlo en FPGA. Las actividades que contienen la palabra software están pensadas para ser realizadas principalmente en C o en Python, aunque también se aceptaría Java. Diseño y elaboración de PCBs implica hacer esquemáticos y plantillas de PCBs (Printed Circuit Boards), además de armarlos físicamente.

Si están interesados en trabajar en alguno de ellos o si tienen otras propuestas, no duden en contactarme a través de los comentarios de este post, de Twitter (@SrSejo) o de Facebook.

Redes neuronales en hardware: reconocimiento de imágenes

Aprovechando la flexibilidad y paralelismo de las FPGAs, en este proyecto se implementarán redes neuronales en ellas. La idea es tener una respuesta inmediata al recibir un estímulo nuevo, lo que le permitiría un funcionamiento óptimo en aplicaciones donde se requiere velocidad. Tengo interés en usarlas para reconocimiento de imágenes, especialmente en reconocimiento de caracteres escritos.

Actividades / Temas:

  • Diseño de hardware digital.
  • Software de interfaz PC – hardware.

Analizador lógico de múltiples canales

Un analizador lógico es un dispositivo que presenta los estados de una señal digital en función del tiempo. En el laboratorio usamos osciloscopios con este fin, con la gran desventaja de que solo cuentan con dos canales debido a la naturaleza analógica de sus posibles entradas. Este proyecto consiste en diseñar un módulo de hardware digital que al conectarlo a una computadora cumpla la función de analizador lógico de múltiples canales.

Actividades / Temas:

  • Diseño de hardware digital.
  • Software de despliegue (graficación) de señales / datos.
  • Software de interfaz PC – hardware.
  • Diseño y elaboración de PCBs.

Brainfuck microcomputer

Brainfuck es un lenguaje de programación ‘esotérico’ consistente en solo ocho instrucciones de un caracter de longitud cada una. La idea de este proyecto es diseñar un procesador junto con hardware periférico mínimo (e.g. interfaz serial) para obtener una computadora que funcione a base de Brainfuck compilado.

Actividades / Temas:

  • Diseño de hardware digital.
  • Software ensamblador / compilador de Brainfuck.
  • Software de interfaz PC – hardware.

Ropa con LEDs

Inspirado en tendencias actuales, este proyecto interdisciplinario (ingeniería + diseño) tiene como fin desarrollar prendas de vestir con LEDs que se encienden por acción de un microcontrolador.

Actividades / Temas:

  • Programación de microcontroladores.
  • Diseño de modas / gráfico / industrial.
  • Diseño y elaboración de PCBs, arreglos de LEDs e interconexiones.
  • Software de interfaz PC – hardware.

Experimentación con distintos microcontroladores y microprocesadores

Más que un proyecto, quisiera hacer pruebas con las siguientes plataformas: ATmega16 (el microcontrolador que sustituirá al 8051 en la materia de Microcontroladores), MicroBlaze (soft-processor de Xilinx que se puede implementar en una FPGA), x86 y x86_64 en Linux

Actividades / Temas:

  • Programación en lenguaje ensamblador.

Engineering: making your dreams come true 😛